KarbosGuide.com. Module 3e.08a

AMD "The Great" Athlon.

The contents:

  • An introduction to K7 Athlon
  • The background
  • No system bus
  • Next page
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  • An overview of Athlon

    The Athlon is a powerful CPU, the first 7th generation CPU in my opinion. It was expected June 1999 but was delayed until August 1999. Intel's response (code name Willamette) was scheduled October 2000.

    Athlon was designed using technologies from DEC Alpha 21064 and 2162 RISC processors. Their "farther" Dirk Meyer came to AMD and brought in an engineering team who succesfully developed the Athlon, which ended up being an enormous success to AMD.

    Within the first months, the markets response to the Athlon was very positive. It seemed (as expected) to outperform the Pentium III at same clock frequency.

    Let us look at what Athlon has to offer:

    Raw data

  • Mounting in a Pentium II like module, which is entirely AMDís own design. The socket is called slot A.
  • A clock speed of 500 MHz in the first versions.
  • Up to 8 MB L2-cache (minimum 512 Kb, without extra TAG-RAM).
  • 128 KB L1-cache.
  • 22 million transistors (the original Pentium III had 9.3 million).

    New bus type

  • A brand new system bus type, which in the first versions will work at 200 MHz. An increase to 400 MHz is expected later. The bus is ready for new fast RAM types.

  • Independent backside bus, which connects the L2 cache. Here the clock speed can be 1/4, 1/3, 2/5 or identical with the internal CPU frequency. That is the same system which is used in the P6 systems where the L2 speed is either half (Pentium II and III Katmai) or full CPU frequency (at Celeron, Xeons and Pentium III CuMine).

    Heavy decoding and FPU

  • Three instruction decoders, which translate the X86 program's CISC instructions to the effective RISC instructions, ROPís, where up to 9 can be executed simultaneously. The first test show a decoding of 2.8 CISC-instruction per clock cycle. This is roughly 30% better than Pentium II and III.

  • Can handle and rearrange up to 72 instructions (ROP out of order) simultaneously (Pentium III can do 40, K6-2 only 24).

  • Enormous FPU performance with three simultaneous instructions and one GFLOP at 500 MHz (1 billion floating-point number operations per second) with 80 bit floating-point numbers. Two GFLOP with MMX and 3DNow! instructions. That at least equals Pentium IIIís performance with full utilization of Katmai. The 3DNow! engine has even been improved comparing to the K6-3.

    The first tests show this FPU performance:

    Processor FPU Winmark
    Intel Pentium III/500 MHz 2562
    AMD Athlon /500 MHz 2767

    The background

    AMD has no license to use the Slot 1 architecture, so the controlling logic comes from Digital Equipment Corp. It is called EV6 and was designed for the 21264 Alpha CPU. AMD developed the first chip sets (750) themselves, but the architecture is royalty free to use. It will be AMD's first processor using a motherboard and chip set specially designed by themselves. VIA has developed a series of chip sets for the Athlon.

    The use of the EV6 bus gives a lot more bandwidth than the Intel GTL+. This means that the Athlon has the capacity to work with new RAM types such as RDRAM. Also the use of 128 KB L1 cache is pretty heavy. The L1 cache is important when the clock speed increases and 128 KB is twice the size in Pentium II's.

    The Athlon came in several versions. The "slowest" ones will have the L2 cache running at one third of the CPU speed, where the best ones (like "Thunderbird") work at full CPU speed (as the Xeons do). The Athlon was intended to give Intel competition in all segments including servers, where the topmodels are being compareable with the best Intel Xeon processors.

    No system bus

    Since the Athlon is not installed in the same way as Pentium II and III, AMD could develop a brand new architecture. This means that there really is no system bus. The Athlon module is connected directly to chipset's "North bridge" in the first edition through a 200 MHz data channel. In a multi-processor system, each CPU will have its own 200 MHz channel.

    That channel connects only two units: the CPU and the chipset. In the P6 systems the CPU, L2-cache, RAM, PCI units, the AGP unit and the chipset are all connected to the system bus. In Athlon the traffic is split. North bridge comes first, then come RAM, AGP, the PCI units and the South bridge.

    Better bandwidth

    By eliminating the system bus and replacing it with the new system, Athlon achieves access to a much bigger bandwidth. In theory the bandwidth in a 200 MHz connection is:

    200,000,000 x 64 bit/ bit/second = 1.6 GB per second.

    That was significantly better than Intel's present systems:

    System Maximum total bandwidth
    Intel 100 MHz 800 MB/sec.
    Intel 133 MHz 1064 MB/sec.
    AMD Athlon, 200 MHz 1600 MB/sec.
    AMD Athlon, 400 MHz 3200 MB/sec.

    The new architecture opens up for new RAM interfaces. We will see support for 100 and 133 MHz SDRAM, for DDR SDRAM and for RDRAM.

    It is also likely that we later can choose from 64, 128 or 256 bit wide RAM access.

  • Next page
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    Learn more

    Read about chip sets on the motherboard in module 2d

    Read more about RAM in module 2e

    Read module 5a about expansion cards, where we evaluate the I/O buses from the port side.

    Read module 5b about AGP and module 5c about Firewire.

    Read module 7a about monitors, and 7b on graphics card.

    Read module 7c about sound cards, and 7d on digital sound and music.

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